Acronyms and Initialisms

AADLArchitecture Analysis & Design Language
ACEAnalog Control Electronics
ACSRAlgebra of Communicating Shared Resources
ALDERISAnalysis Language for Distributed, Embedded, and Real-time Systems
ANSIAmerican National Standards Institute
ASICApplication-specific Integrated Circuit
BAGBandwidth Allocation Gap
BCETBest Case Execution Time
BDDBinary Decision Diagram
BEBest Effort
BFTByzantine Fault Tolerant
BIUBus Interface Unit
BRAINBraided Ring Availability Integrity Network
BTLBackplane Transceiver Logic
CPUCentral Processing Unit
CRCCyclic Redundancy Check
CTLComputation Tree Logic
DESDiscrete Event Simulation
DEDiscrete Event
DREAMDistributed Real-time Embedded Analysis Method
DREDistributed Real-time Embedded
DSMLDomain-specific Modeling Language
ESEnd System
EDFEarliest Deadline First
EDICTError Detection Isolation Containment Types
ETBEvidential Tool Bus
FADECFull Authority Digital Engine Control
FCSFlight Critical Systems
FDIRFault Detection, Isolation, and Recovery
FIFOFirst In First Out
FITFault Injection Techniques in the Time-Triggered Architecture
FLPFischer, Lynch, and Paterson
FMEAFailure Mode and Effects Analysis
FSMFinite State Machine
GPCGeneral Purpose Computer
GSPNGeneralized Stochastic Petri Net
GUIGraphical User Interface
HPCHigh Performance Computing
ICIntegrated Circuit
IMAIntegrated Modular Avionics
ITARInternational Traffic in Arms Regulations
ITUInternational Telecommunication Union
LANLocal Area Network
LLFLeast Laxity First
LRMLine Replaceable Module
MACMedium Access Control
MARTEModeling and Analysis of Real-Time and Embedded Systems
MDMMultiplexer Demultiplexer
MoCModel of Computation
MVSMid-Value Select
NASANational Aeronautics and Space Administration
NICNetwork Interface Controller
nMRn-Modular Redundant
OSATEOpen Source AADL Tool Environment
PCMPulse Code Modulation
PEProcessing Element
RCRate Constrained
RMURedundancy Management Unit
ROBUSReliable Optical Bus
SAESociety of Automotive Engineers
SALSymbolic Analysis Laboratory
SCPSelf-checking Pair
SoSSlightly out of Specification
SPIDERScalable Processor-Independent Design for Enhanced Reliability
STSSpace Transportation System
TDMATime Division Multiple Access
TMRTriple Modular Redundancy
TTP/CTime-triggered Protocol
TTtime triggered
UMLUnified Modeling Language
VLVirtual Link
WCETWorst Case Execution Time
XMLExtensible Markup Language

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